In the construction of a thick film hybrid circuit, it is generally desirable to position the circuit components of the circuit as close to each other as possible, which maximizes component density and minimizes the size of the hybrid circuit. One known method for achieving a high component density for a thick film hybrid circuit is to place conductors, which make electrical interconnects between circuit devices, within a multilayer structure composed of layers of metal runners interlaid with layers of an electrically insulating, or dielectric, material. Successive layers of metal runners are electrically insulated from each other with an intermediate layer of the dielectric material, with metallized holes, or vias, being provided to electrically interconnect metal runners with their corresponding bond pads at the surface of the multilayer structure. The multilayer structure is supported with a suitable substrate which provides structural support for the hybrid circuit.
While multilayer hybrid circuits are advantageous from the standpoint of maximizing component density, they place significant design constraints on the placement and width of certain conductor runners. The current-carrying capacity of printed conductor runners in a hybrid circuit is affected by both the choice of conductor composition and by the runner design. For example, in critical areas such as the narrow regions of attachment for integrated circuit chips, the design of a surface mount package may limit the width of the conductor runners with which it must register. While conductor compositions are commercially available that offer a range of sheet resistances, those characterized by being more readily wire-bondable generally have relatively higher sheet resistances. As a result, those conductor compositions best suited to be wire bonded with surface mount packages exacerbate the already reduced current-carrying capacity of a runner whose width is limited by its surface mount package. Under some circumstances, the width of a runner may be limited to the extent that its current-carrying capability is marginal, even if the runner is printed with the highest conductivity conductor composition that is available and compatible with the rest of the circuit.
Accordingly, what is needed is a thick film hybrid circuit that is configured to promote optimum component density, while also achieving enhanced current-carrying capacity for its printed conductor runners, particularly where the width of a conductor runner is severely limited.